unix - Using a Makefile to store object files in two different directories? [C] -


i need modify makefile have store object file associated "record.c" bin folder. here directory structure looks before executing make.

bin/ include/     -hash_table.h     -history.h     -parser.h     -record.h     -shell.h     -variables.h lib/ obj/ src/     -hash_table.c     -history.c     -parser.c     -record.c     -shutil.c     -sshell.c     -variables.c

...and here makefile:

# beginning of makefile src = src/shutil.c src/parser.c src/sshell.c src/history.c src/hash_table.c src/variables.c src/record.c objs = obj/shutil.o obj/parser.o obj/sshell.o obj/history.o obj/hash_table.o obj/variables.o bin/record.o //<---- header_files = include/shell.h include/parser.h include/history.h include/hash_table.h include/variables.h include/record.h executable = sshell libs = lib/libshell.so lib/libparser.so lib/libhistory.so lib/libhash_table.so lib/libvariables.so lib/librecord.so libcflags = $(cflags) -d_reentrant -fpic cflags = -wall cc = gcc # end of configuration options  #what needs built make files , dependencies all: $(executable)  #create main executable $(executable): $(objs) $(libs)     $(cc) -o $(executable) obj/sshell.o -llib -lparser -lshell -lhistory -lhash_table -lvariables -lrecord  #create library files lib/libparser.so: obj/parser.o     $(cc) $(libflags) -shared $^ -o $@  lib/libshell.so: obj/shutil.o     $(cc) $(libflags) -shared $^ -o $@  lib/libhistory.so: obj/history.o     $(cc) $(libflags) -shared $^ -o $@  lib/libhash_table.so: obj/hash_table.o     $(cc) $(libflags) -shared $^ -o $@  lib/libvariables.so: obj/variables.o     $(cc) $(libflags) -shared $^ -o $@  lib/librecord.so: bin/record.o //<----     $(cc) $(libflags) -shared $^ -o $@  #recursively build object files obj/%.o: src/%.c //<---- feel causing problem.     $(cc) $(cflags) -i./include/ -c $< -o $@  #define dependencies objects based on header files #we overly conservative here, parser.o should depend on parser.h $(objs) : $(header_files)  clean:     -rm -f $(executable) obj/*.o lib/*.so lib/*.a bin/*.o     -rm -f .sshell_history.txt  run: $(executable)     (export ld_library_path=lib; ./$(executable))  # end of makefile

with have done (most off) doesn't compile record.c , says bin/record.o not exist. not experienced makefiles wondering if can have help. thanks!

try using rule .c.o instead of obj/%.o: src/%.c

edit: if doesn't work, maybe adding following rule job:

bin/%.o: src/%.c

$(cc) $(cflags) -i./include/ -c $< -o $@


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