Makefile separate directories -

it takes long time read make , gcc manual. since need basic function of them, want learn them quickly.

the project directory following.

cwd |----source----1.cpp |----header----1.h |----object----1.o |----makefile 

there 3 directories , 1 makefile in current working directories, , "1.cpp" includes "1.h". want use makefile in cwd compile project such object output in object directory.

this simplified version of problem have now. since relatively hard begin scratch, me write makefile simple problem? , try learn , solve own problem. or suggests parts of make , gcc need learn solve problem.

thanks in advance.

this enough compile source , produce object:

object/1.o: source/1.cpp header/1.h     $(cxx) -c source/1.cpp -iheader -o object/1.o 

if want build executable, maybe called "one", add rule above that:

one: object/1.o     $(cxx) object/1.o -o 1  object/1.o: source/1.cpp header/1.h     $(cxx) -c source/1.cpp -iheader -o object/1.o 

to clean things little, use automatic variables:

one: object/1.o     $(cxx) $^ -o $@  object/1.o: source/1.cpp header/1.h     $(cxx) -c $< -iheader -o $@ 

and if want make second rule more general, can handle more objects can turn second rule pattern rule , separate header dependency of 1.o:

one: object/1.o     $(cxx) $^ -o $@  object/1.o: header/1.h  object/%.o: source/%.cpp     $(cxx) -c $< -iheader -o $@ 

and of course there lot more can do, when you're ready.